The present inventive concept generally relates to nonvolatile memory devices and error correction data processing methods thereof.
With the increasing demand for high density semiconductor memory devices, multi-bit memory devices storing two or more bits in a single memory cell are becoming more widely used. In memory cells of a multi-bit flash memory device, for example, it is necessary to densely control each interval between threshold voltage distributions. However, threshold voltages of the memory cells shift over time and with repeated use of the memory device. Thus, the threshold voltage distributions of the memory cells gradually widen or spread due to loss and acquisition of charges. This spread of the threshold voltage distributions leads to increases in the number of errors included in read data. Various error correction decoding operations are performed on read data to enhance reliability of a semiconductor memory device. However, a decoding failure occurs when the number of error bits of error cells exceeds error correction capability. When a decoding failure occurs, error bit correction may be performed through erasure decoding. Repeatedly reading data from a nonvolatile memory is required to perform erasure decoding.